1. Field of the Invention
The present invention relates to programmable logic devices (PLDs), and in particular to an overridable data protection mechanism for PLDS.
2. Description of the Related Art
Programmable logic devices (PLDS) include non-volatile (e.g. EPROM, EEPROM, Flash EPROM, Flash EEPROM, or antifuse) or volatile (e.g. SRAM or DRAM) memory cell arrays which programmably create data paths and logic functions within the devices that are specific to the user's design. The information stored in these arrays is known as configuration data. Typically, these arrays are erasable, thereby allowing the desired functionality of the PLD to be changed many times.
The industry is increasingly using PLDs that can be programmed, erased, and verified in-system, that is, while these devices are soldered into place on the circuit board in which the devices will be used. As is well known to those in the art, the term in-system programmable refers to the entire process of programming a device in-system, and, therefore, encompasses the actions of erasing and verifying the design in the device in addition to the specific action of memory cell programming.
In complex systems that use multiple ISP PLDs, tracking the specific device configuration version in each device is difficult. Typically, multiple ISP PLDs are serially connected for both programming as well as data read out (i.e. verifying). Additional information on the programming, erasing, and verifying of ISP devices is provided in U.S. Pat. No. 5,734,868, entitled "Efficient In-System Programming Structure and Method for Non-Volatile Programmable Logic Devices", which is incorporated herein by reference. If no version information is provided on-chip, a user would have to read out the configuration data from each device to determine the configuration version stored in that device. Clearly, as the number of PLDs increase, this read out procedure becomes increasingly time-consuming and thus undesirable.
To solve this problem, some PLDs include "user signature" registers that store user-specified information. For example, the user may use a user signature register on a PLD to store a short descriptive name and configuration version number for that PLD. The IEEE Standard 1149.1 Test Access Port and Boundary-Scan Architecture (commonly known as JTAG) provides a 32-bit register (referred to as a user code register) which can be used as a user signature register. However, updating the data stored in the user signature register is dependent upon the user manually providing the correct information. Thus, because the correct version may be accidentally overwritten with an incorrect one, a user has no assurance of the correctness of the version information.
Another problem commonly encountered in a complex ISP multiple PLD system is that of unauthorized users programming various PLDs. To solve this problem, some PLDs include a "data protect" bit that disables device programming when set. FIG. 1 illustrates a flowchart for the programming operation of a PLD with a data protect bit. Step 101 starts the programming operation. In step 102, the system (i.e. a computer program for programming the PLD) determines whether the data protect bit has been set. If set, then the system skips to step 104 which ends the programming operation. If the data protect bit has not been set, the system inputs the configuration data in step 103, thereby programming the device. After programming in step 103, the system ends the programming operation in step 104. In some systems using electrically programmable logic devices (EPLDs), programming of the data protect bit is done in conjunction with the programming of the PLD. Thus, reversing the set data protect bit in those systems requires removing the PLD from the board for UV erasing, thereby undesirably consuming engineering time and resources. Moreover, in other systems, the programming of the data protect bit is hard-wired into the PLD, thereby making the bit set operation irreversible.
Therefore, a need arises for an accurate, overridable method of tracking versions of the PLDS, as well as preventing unauthorized users from programming the PLDs.